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LD7513A 11 / 1 5 /2013 1 leadtrend technology corporation www.leadtrend.com.tw LD7513A - d s - 0 0 november 20 1 3 primary side quasi - resonant bjt controller with cv/cc operation rev. 0 0 general description the LD7513A is an excellent primary side feedback bjt controller with cv/cc operation, integrated with several functions of protections. it minimizes the compone nt counts and is available in a tiny sot - 26 package. those make it an ideal design for low cost applications. it provides functions of ultra - low startup current, green - mode power - saving operation and leading - edge blanking of the current sensing. also, the ld751 3 a features internal otp (over temperature protection) and ovp (over voltage protection) to prevent the circuit from being damaged due to abnormal conditions. in most cases, the power supply with primary - side feedback controller would accompany with s ome serious load regulation effect. to deal with this problem, the LD7513A consists of dedicated load regulation compensation circuit to enhance its performance. feature s ? primary - side feedback control w ith q uasi - resonant operation ? direct d rive o f bjt s witch ? constant voltage within ? 5% ? built - in adjustable load regulation compensation ? constant current control ? ultra - low startup current (<1. 9 ? a ) ? 0.5m a low operating current a t light load ? 75 k h z maximum switching frequency . ? current mode control ? green mode c ontrol improve efficiency ? leb ( leading - edge blanking ) o n cs pin ? built - in soft start ? vcc ovp ( over voltage protection ) ? fb pin open / short protection ? internal otp (over temperature protection) applications ? mobile phone adapter ? lower power ac/dc adapter typical application v c c a c i n p u t a c i n p u t e m i f i l t e r o u t c s c o m p l d 7 5 1 3 a g n d f b
LD7513A 2 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 pin configuration order ing information part number package t op mark shipping LD7513A gl sot - 26 ywp/ 1 3a 3000 / tape & reel the LD7513A is rohs compliant / green packaged pi n descriptions pin name function 1 vcc supply voltage pin. 2 gnd ground. 3 fb auxiliary voltage sense and quasi resonant detection. 4 cs current sense pin, connect to sense the switch current. 5 comp output of the error amplifier for voltage compensa tion. 6 out base drive output to drive the external bjt switch. sot - 26 (top view) yy, y : year code (d: 2004, e: 2005 ..) ww, w : week code pp : production code p 1 3a : ld75 1 3a 1 2 3 4 5 6 vcc gnd fb out comp cs y w p 1 3a pp
LD7513A 3 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 block diagram out internal bias & vref gnd 13 v / 4 v vref ok pg 18 v vcc protection ovp uvlo comparator base driver ovp comparator vcc ok fb pwm comparator 2 r r r s q error amplifier load compensation max . frequency & green mode cs 1 v leading edge blanking internal otp 0 . 1 v / 0 . 4 v qrd gm 2 . 0 v sample and hold comp qrd blanking time time - out 1 c . c . fb buffer qrd v comp time - out 2 delay counter protection pg r s q q ovp 0 . 5 v s / h s / h uvp c . c . fb vcc cc control cs qrd
LD7513A 4 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 absolute maximum ratings supply voltage vcc, 20v out - 0.3 ~3.3v comp, fb, cs - 0.3 ~3.3v maximum junction temperature 150 ? c storage temperature range - 6 5 ? c to 1 50 ? c package thermal resistance (sot - 26, ja ) 200 ? c /w power dissipation (sot - 26, at ambient temperature = 85 ? c ) 200mw lead temperature (soldering, 10sec) 260 ? c esd voltage protection, human body model 2.5 kv esd voltage protection, machine model 250 v caution: stress exceeding maximum r atings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stress above recommended operating conditions may affect device reliability recomme nded operating conditions item min. max. unit operating ambient temperature - 40 85 ? c operating junction temperature - 40 125 ? c supply vcc voltage 5.5 16 v vcc capacitor 2.2 10 ? f start - up resistor value (ac side, half wave) 1m 6.6 m ? comp pin capac itor 470 4700 p f note: 1. it s essential to connect vcc pin with a smd ceramic capacitor (0.1 ? f~0.47 ? f) to filter out the undesired switching noise for stable operation. this capacitor should be placed close to ic pin as possible 2. connecting a capacitor to co mp pin is also essential to filter out the undesired switching noise for stable operation. 3. the small signal components should be placed close to ic pin as possible.
LD7513A 5 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 electrical characteristics (t a = +25 ? c unless otherwise stated, v cc =1 2 .0v) parameter co nditions sym. min typ max units supply voltage (vcc pin) startup current vcc=uvlo - on - 0.05v i cc - st --- 1.0 1.9 ? comp =2.5v, out= open, fb=2v i cc - op1 0.45 0.55 0.65 ma v comp =0v, out=open, fb=2v i cc - op2 0.4 0.5 0.6 ma ovp/fb uvp t ripped, fb=0v i cc - opa 0.18 0.25 0.32 ma uvlo (off) v cc - off 3.4 4.0 4.6 v uvlo (on) v cc - on 12 13 14 v vcc ovp level v cc - ovp 17 18 19 v vcc ovp de - bounce time * t d - vccovp --- 90 --- ? error amplifier (comp pin) reference voltage, v ref v ref 1.9 8 2. 00 2. 02 v tran s conductance gm - comp 70 90 110 ? fb = v ref +0.05 , v comp =2v* i comp - sink1 --- - 4 --- ? fb =2.6 v i comp - sink2 - 92 - 80 - 68 ? fb = vref - 0.05 v , v comp =2v* i comp - source1 --- 4 --- ? fb = 1.4 v i comp - source2 6.5 10 13.5 ? fb =1v * v comp - clamp --- 3 --- v load compensation current v comp =3v i load comp 17 20 23 ? current sensing (cs pin) maximum input voltage, v cs - off v cs - max 0.95 1 1.05 v minimum v cs - off v comp < 0.45v v cs - min 0.13 0.15 0.1 7 v leading edge blanking time t leb 450 580 710 ns input impedance * z cs 1 --- --- m ? pd --- 100 --- ns qrd (quasi resonant detection , fb pin ) lower clamp voltage i det = - 1 m a * v fb - clamp - l --- - 0.3 --- v qr d trip level * v qrd --- 100 --- mv hysteresis* v qrd - hys --- 300 --- mv qr mode time out 1 * t out1 --- 6 --- ? out2 --- 4 --- ms during soft start* t out2 - ss --- 80 --- ? qr - blank --- 1 --- ? fb =1v~5v, out=off * i fb - ib 0.0 --- 1.0 ?
LD7513A 6 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 parameter conditions sym. min typ max units oscillator for switching frequency maximum frequency f sw - max 6 5 75 8 5 khz green mode frequency f sw - green 20 25 34 khz minimum frequency f sw - min 0.9 1 .2 1. 44 khz maximum on time maximum on time t on - max 10 13 18 ? s output drive (out pin) output low on - resistance i sink =50ma r out - l -- 2.5 3 ? max. output base current vcs=1v i b - max 27.5 30 36.5 ma soft start soft star t time * t ss --- 5 --- ms fb under voltage protection (uvp, fb pin) under voltage level v fb - uvp 0.4 0.5 0.6 v uvp delay time a fter soft start* t d - fbuvp --- 10 --- ms at start - up* t d - fbuvp - ss --- 15 --- ms c.c. disable level * v fb - cc --- 1.0 --- v o n chip otp (over temperature) otp level * t inotp --- 1 3 0 --- ? c otp hysteresis * t inotp - hys --- 2 0 --- ? c * : g uaranteed by design.
LD7513A 7 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 typical performance characteristics v cc - on (v) fig. 1 uvlo (on) vs. temperature temperature ( ? c) 1 0 .0 1 1 . 0 1 2.0 13. 0 1 4.0 1 5 .0 - 40 0 40 80 120 125 v cc - off (v) temperature ( ? c) fig. 2 uvlo ( o ff ) vs. temperature 1 . 0 3 .0 4.0 6.0 2 . 0 - 40 0 40 80 120 125 5.0 i cc - st ( ? a ) temperature ( ? c) fig. 3 start up current vs. temperature 0 . 5 1 . 0 2 . 0 0 . 0 - 40 0 40 80 120 125 1 . 5 f sw - max (khz) fig. 4 max frequency v s. temperature temperature ( ? c) - 40 60 6 5 70 75 80 85 0 40 80 120 125 f sw - green (khz) temperature ( ? c) fig. 5 green mode frequency vs. temperature 1 9 21 2 3 2 5 2 7 2 9 - 40 0 40 80 120 125 f sw - min (khz) temperature ( ? c) fig. 6 min frequency vs. temperature 0 . 9 1. 0 1. 1 1. 2 1 .3 1 . 4 - 40 0 40 80 120 125
LD7513A 8 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 v ref (v) temperature ( ? c) fig. 7 reference voltage vs. temperature - 40 0 40 80 120 125 1.9 8 1.99 2.00 2.0 1 2.0 2 1.9 7 -40 -20 0 20 40 60 80 100 120 0 3 6 9 12 15 18 y axis title x axis title -40 -20 0 20 40 60 80 100 120 0 3 6 9 12 15 18 y axis title x axis title i load c omp ( ? a) temperature ( ? c) fig. 8 load compensation vs. temperature - 40 0 40 80 120 12 5 5 10 15 20 25 0 30 v cs - max (v) temperature ( ? c) fig. 9 v cs ( off ) vs. temperature 0. 94 0. 96 0. 98 1.00 1.02 1.04 - 40 0 40 80 120 125 v cc - ovp (v) temperature ( ? c) fig. 10 vcc ovp vs. temperature 1 5 1 6 17 18 19 20 - 40 0 40 80 120 125 r out - l ( ? ) temperature ( ? c) fig. 1 1 output low on - resistance vs. temperature - 40 0 40 80 120 125 0 .5 1 . 5 2 .5 3 . 5 4 . 5 i b - max ( ma ) temperature ( ? c) fig. 1 2 max. output base current vs. temperature - 40 0 40 80 120 125 0 10 2 0 3 0 40 50
LD7513A 9 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 application information operation overview the LD7513A is an excellent primary side feedback controller with quasi - resonant operation to provide high efficiency. the LD7513A removes the need for secondary feedback circuits while achieving excellent line and load regulation. i t meets the green - power requirement and is intended for the use in those modern switching power suppliers and linear adaptors that demand higher power efficiency and power - saving. it integrates with more functions to reduce the extern al components counts and the size. m ajor features are described as below. under voltage lockout (uvlo) an uvlo comparator is implemented in it to detect the voltage across vcc pin. it would assure the supply voltage enough to turn on the LD7513A and furth er to drive the power bjt. as shown in fig. 13, a hysteresis is built in to prevent shutdown from voltage dip during startup. fig. 13 startup current and startup circuit t he typical startup circuit to generate vcc of the LD7513A is shown in fig. 14. during startup transient , the vcc i s below the uvlo (on) threshold, so there s no pulse delivering out from LD7513A to drive the power bjt. therefore, the current through r1 will be used to charge the capacitor c1. until the vcc is fully charged to enable the LD7513A to deliver the drive - out signal, the auxiliary winding will provide the supply current instead. i f pwm controller requires less current to start up, it will allow less power consumption on r1. by using cmos process a nd some unique circuit design, the LD7513A requires only 1.9 ? a max to start up. higher resistance of r1 will spend much more time to start up. t he user is recommended to select proper value of r1 and c1 to optimize the power consumption and startup time. fig. 14 vcc uvlo(on) uvlo(off) t t i(vcc) startup current (~ua) operating current (~ ma) e m i f i l t e r r 1 o u t c s v c c g n d l d 7 5 1 3 a a c i n p u t c 1 c b u l k d 1
ld 7513a 10 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 principle of cv operation in the dcm flyback converter, it can sense the output voltage from auxiliary winding. LD7513A s amples the auxiliary winding on the primary - side to regulate the output voltage, as shown in the fig. 15 . the voltage induced in the auxiliary winding is a reflection of the secondary winding voltage while the bjt is in off state. via a resistor divider connected between the auxiliary winding and fb pin, the auxiliary voltage is sampled after t he sample delay time and will be hold until the next sampling period . the sampled voltage is compared with an internal reference v ref (2. 0 v) and the error will be amplified. the error amplifier output comp reflects the load condition and controls the duty cycle to regulate the output voltage, thus constant output voltage can be achieved. the output voltage is given as: where v f indicates the drop voltage of the output d iode , ra and rb are top and bottom feedback resistor value, ns a nd na are the turns of transformer secondary and auxiliary . in case that the output voltage is sensed through the auxiliary winding; the leakage inductance will induce ringing to affect output regulation. to optimize the collector voltage clamp circuit wil l minimize the high frequency ringing and achieve the best regulation. fig . 16 shows the desired collector voltage waveform in compare to those with large undershoot due to leakage inductance induced ring (fig. 17) . th e ringing may make the sample error an d cause poor performance for output voltage regulation. a proper selection for resistor rs, in series with the clamp diode, may reduce any large undershoot, as shown in fig. 1 8 . fig. 15 fig. 16 fig.17 fig.18 f out v ) na ns )( rb ra 1 ( v 0 . 2 v ? ? ? o u t c s c o m p f b n a n s n p r a r b v i n s / h v r e f + - d r i v e r l d 7 5 1 3 a v c e t h e o v e r s h o o t h e r e i s m i n o r v c e t h e u n d e r s h o o t w o u l d m a k e t h e s a m p l e e r r o r . o u t c s c o m p f b n a n s n p r a r b v i n l d 7 5 1 3 a r s
ld 7513a 11 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 load regulation compensation LD7513A is implement ed with load regulation compensation to compensate the cable voltage drop and to achieve a better voltage regulation . the offset v oltage is created across fb by an internal sink current source which feeds out the fb during the sampling period . the internal sink current source is proportional to the value of v comp , as shown in fig. 19. a s a result, the drop due to the cable loss can b e compensated. so, the offset voltage decreases as the v comp decreases in condition from full - load to no - load. it can also be programmed by adjusting the resistance of the voltage divider to compensate the drop for various cable lines used. the equat ion o f internal sink current is shown as: the maximum compe n sation is shown as: fig. 19 q uasi - r esonant mode detection the LD7513A employs quasi - re sonant (qr) switching scheme to swi tch in valley - mode either in cv or cc operation. this will greatly reduce the switching loss and the ratio dv/dt in the entire operating range for the power supply. fig. 20 shows the typical qr detection block . the qr detection block will detect auxiliary winding signal to drive bjt as fb pin voltage drops to 0.1v. the qr comparator will not activate if fb pin voltage remains above 0.4v. fig. 20 multi - mode operation t he LD7513A is a qr controller operating in multi - mode s . t he controller changes operation mode s according to line voltage and load conditions. at heavy - load (v comp >1. 8 v, fig . 21 ), there might be two situations to meet. if the system ac input is in low line, the LD7513A will turn on in first valley. if in high lin e, the switching frequency will increase till over the limit of 75 khz and skip the first valley to turn on in 2 nd , 3 rd .valley. the switching frequency would var y depending on the line voltage and the load conditions when the system is operated in qr mode . at mediu m or light load conditions (0 . 7 vLD7513A will turn on in 4 th , 5 th . valley. that i s, when the load decreases, the system will automatically skip some valleys and the switching frequency is therefore reduced. a smooth frequency fold - back and high power efficiency are then achieved. at zero load or very light load conditions (v comp < 0. 3 v ) , the system operates in minimum frequency for power saving . t he system modulates the frequency according to the load and v comp conditions. a) ( 7.84 0.45) (v i comp fb ? ? ? ? 2 (ra//rb) i vo v fb ? ? v c o m p ( v ) 0 3 . 0 0 . 4 5 2 0 i f b ( ? a ) fb pwm 2 r r r s q error amplifier load compensation max . frequency & green mode cs 1 v leading edge blanking 0 . 1 v / 0 . 4 v qrd gm 2 . 0 v sample and hold qrd blanking time time - out 1 buffer qrd v comp time - out 2 s / h c . c . fb turn - on turn - off ra rb n aux
ld 7513a 12 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 fig. 21 current sensing and leading - edge blanking the typical current mode of pwm c ontroller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. as shown in fig. 22, the LD7513A detects the primary bjt current from the cs pin, which is not only for the peak current mode control but also for the pulse - by - pulse current limit. the maximum voltage threshold of the current sensing pin is set at 1v. from above, the bjt peak current can be obtained from below. a leading - edge blanking (leb) time is included in the input of cs pin to prevent the false - trigger from the turn - on current spike. fig. 22 principle of c.c. operation t he p rimary side control scheme is applied to eliminate secondary feedback circuit or o p to - coupler, which will reduce the sy stem cost. the switching waveforms are shown in fig. 23 . t he output current i o can be expressed as: the primary peak current ( i p , p k ) , inductor current discharge time (t dis ) and switching period (t s ) can be detected by the ic . t he ratio of v cs* t dis /t s will be modulate d as a constant (v cs* t dis /t s =1/3). so that i o can be finally obtained as however this is an approximat e equation. the user may fine - tune it according to the experiment result. fig. 23 q u a s i r e s o n a n t ( f i r s t v a l l e y ) d i s c o n t i n u o u s w i t h v a l l e y s w i t c h i n g ( 2 n d , 3 r d , 4 t h . . . v a l l e y ) 2 5 k h z 1 . 2 k h z 7 5 k h z v c o m p f s g r e e n m o d e 1 . 4 0 . 7 0 . 3 1 . 8 cs peak(max) r 1v i ? o u t c s c o m p f b n a n s n p r a r b v i n l d 7 5 1 3 a r s l e b t i m e r c s s dis cs cs s p dis pk p, s p s dis pk s, t t r v n n 2 1 ts t i n n 2 1 t t i 2 1 io ? ? ? ? ? ? ? ? 3 1 r 1 n n 2 1 t t r v n n 2 1 io s s p s dis s cs s p ? ? ? ? ? ? o u t i p i s i p , p k i s , p k t o n t d i s t s
ld 7513a 13 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 ovp (over voltage protection) on vcc C LD7513A is implemented with ovp function through vcc. as the vcc voltage rises over the ovp threshold voltage, the output drive circuit will be shutdown simultaneously thus to stop the switching of the power bjt until the next uvlo(on) arrives. the vcc ovp function of LD7513A is an auto - recovery type protection. t he fig. 24 shows its operation. on the other hand, if the ovp condition is removed, the vcc level will get back to normal level and the output will automatically return to the normal operation. fig. 24 fb under voltage protection (fb uvp) C auto recovery LD7513A is implemented with an uvp function over fb pin. if the fb voltage falls below 0.5 v for over the delay time, the protection will be activated to stop the switching of the power bjt until the next uvlo(on) arrives. the fb uvp function in LD7513A is an auto - recovery type protection. t he fig. 25 shows its operation. the fb uvp is disabled du ring the soft start period . fig. 25 v c c u v l o ( o n ) u v l o ( o f f ) t o v p t r i p p e d t o u t s w i t c h i n g s w i t c h i n g n o n - s w i t c h i n g o v p l e v e l f b u v p l e v e l t f b u v p t r i p p e d t o u t s w i t c h i n g s w i t c h i n g n o n - s w i t c h i n g v c c t f b u v p d e l a y t i m e u v l o ( o n ) u v l o ( o f f ) s o f t s t a r t + f b u v p d e l a y t i m e f b s h o r t
LD7513A 14 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 package information sot - 26 symbol dimension in millimeters dimensions in inches min max min max a 2.692 3.099 0.106 0.122 b 1.397 1.803 0.055 0.071 c ------- 1.450 ----- -- 0.057 d 0.300 0.5 00 0.012 0.020 f 0.95 typ 0.037 typ h 0.080 0.254 0.003 0.010 i 0.050 0.150 0.002 0.006 j 2.600 3.000 0.102 0.118 m 0.300 0.600 0.012 0.024 0 10 0 10 i mportant notice leadtrend technology corp. reserves the right to make changes or corrections to its products at any time without notice. customers should verify the datasheets are current and complete before placing order.
LD7513A 15 leadtrend technology corporation LD7513A - d s - 0 0 november 201 3 r e vision history rev. d a te change notice 00 1 1 / 1 5 /2013 original specification .

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